AS4C4M16S Datasheet - Alliance Semiconductor

AS4C4M16S 64Mb / 4M x 16 bit Synchronous DRAM

Table 3. Pin Details of AS4C4M16S Symbol CLK Type Input Description Clock: CLK is driven by the system clock. All SDRAM input signals are sample on the positive edge of CLK. CLK also increments the internal burst counter and controls the output registers. Clock Enable: CKE activates (HIGH) and deac.

AS4C4M16S Revision History AS4C4M16S- 54PIN 400 MIL PLASTIC TSOP II PACKAGE Revision Rev 1.0 Rev 2.0 Details Preliminary datasheet Removed 6TAN automotive temp page 1 and page 52 (see separate datasheet for this option) Added 6TCN 166MHz clock commercial temp page 1 and page 52 Added in temperature range to page 1 Operating temperature range - Commercial (0 ~ 70°C) - Industrial (-40 ~ 85°C) Date February 2011 May 2014 May 2014 May 2014 Alliance Mem.

AS4C4M16S Features

* Fast access time from clock: 5.4/5.4 ns Fast clock rate: 166/143 MHz Fully synchronous operation Internal pipelined architecture 1M word x 16-bit x 4-bank Programmable Mode registers - CAS Latency: 2, or 3 - Burst Length: 1, 2, 4, 8, or ful

AS4C4M16S-AllianceSemiconductor.pdf