ADP320 - High PSRR Voltage Regulator
The ADP320 200 mA triple output LDO combines high PSRR, low noise, low quiescent current, and low dropout voltage in a voltage regulator ideally suited for wireless applications with demanding performance and board space requirements.
The low quiescent current, low dropout voltage, and wide input vo
ADP320 Features
* Bias voltage range (VBIAS): 2.5 V to 5.5 V LDO input voltage range (VIN1/VIN2, VIN3): 1.8 V to 5.5 V Three 200 mA low dropout voltage regulators 16-lead, 3 mm × 3 mm LFCSP Initial accuracy: ±1% Stable with 1 µF ceramic output capacitors No noise bypass capacitor required 3 independent logic controll
