ADSP-2104, ADSP2104 Datasheet - Analog Devices

ADSP-2104, ADSP2104, Low Cost DSP Microcomputers

a SUMMARY 16-Bit Fixed-Point DSP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-Bus Performance: Instruction Bus & Dual D.
Low Cost DSP Microcomputers ADSP-2104/ADSP-2109 FUNCTIONAL BLOCK DIAGRAM DATA ADDRESS GENERATORS DAG 1 DAG 2 MEMORY PROGRAM SEQUENCER PROGRAM MEMORY.

Features

* 20 MIPS, 50 ns Maximum Instruction Rate Separate On-Chip Buses for Program and Data Memory Program Memory Stores Both Instructions and Data (Three-Bus Performance) Dual Data Address Generators with Modulo and Bit-Reverse Addressing Efficient Program Sequencing with Zero-Overhead Looping: Single-Cycl

Applications

* The ADSP-2104/ADSP-2109 processors are built upon a common core. Each processor combines the core DSP architecture
* computation units, data address generators, and program sequencer

ADSP2104_AnalogDevices.pdf