* and ports (serial, link, external bus, and JTAG) SHARC Digital Signal Processor ADSP-21160M/ADSP-21160N FEATURES 100 MHz (10 ns) core instruction rate (ADSP-21160N) Single-cycle instruction execution, including SIMD opera- tions in both computational units Dual data address generators (DAGs) with
ADSP-21160M Datasheet (755.40 KB)
ADSP-21160M
755.40 KB
Digital signal processor.
SUMMARY
High performance 32-bit DSP
*applications in audio, medical, military, graphics, imaging, and communication
Super Harvard architecture<.
📁 Related Datasheet
ADSP-21160 - DSP Microcomputer
(Analog Devices)
a
Preliminary Technical Data
SUMMARY
•
DSP Microputer ADSP-21160
KEY FEATURES
• • • • • • •
•
• •
•
High performance 32-bit DSP—applications .
ADSP-21160N - Digital Signal Processor
(Analog Devices)
SUMMARY
High performance 32-bit DSP—applications in audio, medical, military, graphics, imaging, and munication
Super Harvard architecture—4 indepe.
ADSP-21161 - SHARC Processor Hardware Reference
(Analog Devices)
ADSP-21161 SHARC® Processor Hardware Reference
Revision 4.0, February 2005 Part Number 82-001944-01
Analog Devices, Inc. One Technology Way Norwood,.
ADSP-21161N - SHARC Processor
(Analog Devices)
SUMMARY
High performance 32-Bit DSP—applications in audio, medical, military, wireless munications, graphics, imaging, motor-control, and telephony.
ADSP-2111 - DSP Microcomputers
(Analog Devices)
a
ADSP-2100 Family DSP Microputers
ADSP-21xx
SUMMARY 16-Bit Fixed-Point DSP Microprocessors with
On-Chip Memory Enhanced Harvard Architecture fo.
ADSP-2115 - DSP Microcomputers
(Analog Devices)
a
ADSP-2100 Family DSP Microputers
ADSP-21xx
SUMMARY 16-Bit Fixed-Point DSP Microprocessors with
On-Chip Memory Enhanced Harvard Architecture fo.
ADSP-2100A - DSP Microcomputers
(Analog Devices)
a
DSP Microputers with ROM
ADSP-216x
SUMMARY 16-Bit Fixed-Point DSP Microprocessors with
On-Chip Memory Enhanced Harvard Architecture for Three-.
ADSP-2101 - DSP Microcomputers
(Analog Devices)
a
ADSP-2100 Family DSP Microputers
ADSP-21xx
SUMMARY 16-Bit Fixed-Point DSP Microprocessors with
On-Chip Memory Enhanced Harvard Architecture fo.
