ADSP-TS101S Datasheet (Analog Devices) - TigerSHARC Embedded Processor

ADSP-TS101S, TigerSHARC Embedded Processor

GENERAL DESCRIPTION .

2 Dual Compute Blocks .

3 Data Alignment Buffer (DAB) .

4 Dual Integer ALUs (IALUs) .

4 Program Sequencer .

ADSP-TS101S Features

* 300 MHz, 3.3 ns Instruction Cycle Rate 6M Bits of Internal

* On-Chip

* SRAM Memory 19 mm ؋ 19 mm (484-Ball) or 27 mm ؋ 27 mm (625-Ball) PBGA Package Dual Computation Blocks

* Each Containing an ALU, a Multiplier, a Shifter, and a Register File Dual Integer ALUs, Providing Data Addr