Description
m o .c U 4 t e e h S a at .D w w w a DSP Microcomputer ADSP-2192M 80K Words of On-Chip RAM on P0, Configured as 64K Words On-Chip 16-Bit RAM for Dat.
3 DSP Core Architecture.
Features
* 320 MIPS ADSP-219x DSP in a 144-Lead LQFP Package with PCI, USB, Sub-ISA, and CardBus Interfaces 3.3 V/5.0 V PCI 2.2 Compliant 33 MHz/32-bit Interface with Bus Mastering over Four DMA Channels with Scatter-Gather Support Integrated USB 1.1 Compliant Interface Sub-ISA Interface AC’97 Revision 2.1 Com
Applications
* and is ideally suited for PC peripherals. The ADSP-2192M combines the ADSP-219x family base architecture (three computational units, two data address generators and a program sequencer) into a chip with two core processors (see the Functional Block Diagram on Page 1 and Figure 1). The ADSP-2192M’s