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AZ100LVE310 ECL/PECL 2:8 Differential Clock Driver

AZ100LVE310 Description

www.DataSheet4U.com ARIZONA MICROTEK, INC.AZ100LVE310 ECL/PECL 2:8 Differential Clock Driver .
The AZ100LVE310 is a low skew 2:8 fanout buffer designed with clock distribution in mind.

AZ100LVE310 Features

* PACKAGE AVAILABILITY Operating Range of 3.0V to 5.5V PACKAGE PART NUMBER MARKING NOTES Low Skew AZM100LVE310 Guaranteed Skew Spec PLCC 28 AZ100LVE310FN 1,2 Differential Design 1 Add R2 at end of part number for 13 inch

AZ100LVE310 Applications

* the VBB reference should be connected to one side of the CLKa/CLKb differential input pair. The input signal is then fed to the other CLKa/CLKb input. The VBB pin should be used only as a bias for the AZ100LVE310 as its current sink/source capability is limited. When used, the VBB pin should be byp

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Datasheet Details

Part number
AZ100LVE310
Manufacturer
Arizona Microtek
File Size
97.89 KB
Datasheet
AZ100LVE310_ArizonaMicrotek.pdf
Description
ECL/PECL 2:8 Differential Clock Driver

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ECL PECL Differential Clock Driver Arizona Microtek
Arizona Microtek AZ100LVE310-like datasheet