CY24130 - HOTLink II SMPTE Receiver Training Clock

Cypress Semiconductor

Datasheet Details

Benefits.
Integrated phase-locked loop.
Low-jitter, high-accuracy outputs.
3.3V operation.
Internal PLL with up to 400-MHz internal operation.
Meets critical timing requirements in complex system designs.
Enables application compatibility Table 1. Frequency table Part Number Outputs CY24130-1 2 CY24130-2 2 Input Frequency 27 MHz (Driven Reference) 27 MHz (Crystal Reference) Output Frequency Range 1 copy 27-MHz reference clock output 1 copy of 27-/36-/54-/.

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Published: Oct 13, 2006 |