CY24142 - MediaClock Multimedia Clock Generator

Cypress Semiconductor

Datasheet Details

Pin Name XIN VDD AVDD OE1 AVSS VSSL NC CLK1 CLK2 OE2 VDDL NC VSS CLK3 CLK4 XOUT Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Crystal Input.

Integrated phase-locked loop (PLL).
Low-jitter, high-accuracy outputs.
3.3V operation Benefits.
Integrated high-performance PLL eliminates the need for.
external loop filter components.
Meets critical timing requirements in complex system designs.
Enables application compatibility Logic Block Diagram XIN XOUT P OSC. Q Φ VCO OUTPUT.

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Published: Oct 13, 2006 |