CY24142 Datasheet - Cypress Semiconductor

CY24142 MediaClock Multimedia Clock Generator

Pin Name XIN VDD AVDD OE1 AVSS VSSL NC CLK1 CLK2 OE2 VDDL NC VSS CLK3 CLK4 XOUT Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Crystal Input. Voltage Supply. Analog Voltage Supply. Output Enable 1, 0 = CLK 2 and CLK3 off, 1 = CLK 2 and CLK3 on; weak internal pull-down. Analog Ground. VDDL Ground..

CY24142 Features

* Integrated phase-locked loop (PLL)

* Low-jitter, high-accuracy outputs

* 3.3V operation Benefits

* Integrated high-performance PLL eliminates the need for

* external loop filter components

* Meets critical timing requirements in complex system desig

CY24142 Datasheet (273.39 KB)