CY29973 - 3.3V 125-MHz Multi-Output Zero Delay Buffer

Cypress Semiconductor

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Datasheet Details

Part number	CY29973
Manufacturer	Cypress Semiconductor
File Size	272.16 KB
Description	3.3V 125-MHz Multi-Output Zero Delay Buffer
Datasheet	CY29973_CypressSemiconductor.pdf

CY29973 Product details

Description

44, 46, 48, 50 QA(3:0) 32, 34, 36, 38 QB(3:0) 16, 18, 21, 23 QC(3:0) 29 FB_OUT 25 SYNC VDDC O 42, 43 40, 41 19, 20 5, 26, 27 52 31 6 7 8 2 SELA(1,0) SELB(1,0) SELC(1,0) FB_SEL(2:0) VCO_SEL FB_IN PLL_EN REF_SEL TCLK_SEL MR#/OE I I I I I I I I I I 14 3 4 17, 22, 28, 33,37, 45, 49 13 INV_CLK SCLK SDATA VDDC VDD I I I PU PU PU 1, 15, 24, 30, VSS 35, 39, 47, 51 Note 2. A bypass capacitor (0.1μF) must be placed as close as possible to each positive power (

Features

Output Frequency up to 125 MHz 12 Clock Outputs: Frequency Configurable 350 ps max. Output to Output Skew Configurable Output Disable Two Reference Clock Inputs for Dynamic Toggling Oscillator or PECL Reference Input.
Spread Spectrum Compatible Glitch-free Output Clocks Transitioning 3.3V Power Supply Pin Compatible with MPC973 Industrial Temperature Range: - 40°C to +85°C 52-Pin TQFP Package Table 1. Frequency Table[1] V.

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Published: Aug 8, 2011 |