Datasheet Details
- Part number
- CY29973
- Manufacturer
- Cypress Semiconductor
- File Size
- 272.16 KB
- Datasheet
- CY29973_CypressSemiconductor.pdf
- Description
- 3.3V 125-MHz Multi-Output Zero Delay Buffer
CY29973 Description
CY29973 3.3V 125-MHz Multi-Output Zero Delay Buffer .CY29973 Features
* Output Frequency up to 125 MHz 12 Clock Outputs: Frequency Configurable 350 ps max. Output to Output Skew Configurable Output Disable Two Reference Clock Inputs for Dynamic Toggling Oscillator or PECL Reference InputCY29973 Applications
* the CY29973 offers a low voltage PECL clock input as a PLL reference. This allows the user to use LVPECL as the primary clock distribution device to take advantage of its far superior skew performance. The CY29973 then can lock onto the LVPECL reference and translate with near zero delay to low skew
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