CY29976 - Multi-Output Zero Delay Buffer
25 SYNC VDDC O 42, 43 40, 41 19, 20 5, 26, 27 52 31 6 7 8 SELA(1,0) SELB(1,0) SELC(1,0) FB_SEL(2:0) VCO_SEL FB_IN PLL_EN REF_SEL TCLK_SEL I I I I I I I I I 2 MR#/OE I PU 14 3 4 17, 22, 28, 33,37, 45, 49 13 1, 15, 24, 30, 35, 39, 47, 51 INV_CLK SCLK SDATA VDDC VDD VSS I I I PU PU PU N
CY29976 Features
* Output frequency up to 125 MHz Supports PowerPC , and Pentium processors 12 clock outputs: frequency configurable Configurable Output Disable Two reference clock inputs for dynamic toggling Oscillator or PECL reference input ® ®
