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CY29976 Multi-Output Zero Delay Buffer

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Description

CY29976 3.3V, 125-MHz, Multi-Output Zero Delay Buffer .
25 SYNC VDDC O 42, 43 40, 41 19, 20 5, 26, 27 52 31 6 7 8 SELA(1,0) SELB(1,0) SELC(1,0) FB_SEL(2:0) VCO_SEL FB_IN PLL_EN REF_SEL TCLK_SEL I I I.

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Datasheet Specifications

Part number
CY29976
Manufacturer
Cypress Semiconductor
File Size
297.56 KB
Datasheet
CY29976_CypressSemiconductor.pdf
Description
Multi-Output Zero Delay Buffer

Features

* Output frequency up to 125 MHz Supports PowerPC , and Pentium processors 12 clock outputs: frequency configurable Configurable Output Disable Two reference clock inputs for dynamic toggling Oscillator or PECL reference input ® ®

Applications

* the CY29976 offers a low voltage PECL clock input as a PLL reference. This allows the user to use LVPECL as the primary clock distribution device to take advantage of its far superior skew performance. The CY29976 then can lock onto the LVPECL reference and translate with near zero delay to low skew

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