CY7C1325 - 256K x 18 Synchronous 3.3V Cache RAM

Cypress Semiconductor

The CY7C1325 by Cypress Semiconductor is a 256K x 18 Synchronous 3.3V Cache RAM. Below is the official datasheet preview.

Datasheet Details

Part number	CY7C1325
Manufacturer	Cypress Semiconductor
File Size	506.51 KB
Description	256K x 18 Synchronous 3.3V Cache RAM
Datasheet	CY7C1325_CypressSemiconductor.pdf
Additional preview pages of the CY7C1325 datasheet.

The CY7C1325 is a 3.3V, 256K by 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic.

Supports 117-MHz microprocessor cache systems with zero wait states.
256K by 18 common I/O.
Fast clock-to-output times.
7.5 ns (117-MHz version).
Two-bit wrap-around counter supporting either interleaved or linear burst sequence.
Separate processor and controller address strobes provides direct interface with the processor and external cache controller.
Synchronous self-timed write.
Asynchronous output enable.
I/Os.

📁 CY7C1325 Similar Datasheet

CY7C131AE - 1K/2K x 8 Dual-Port Static RAM (Cypress)
CY7C131E - 1K/2K x 8 Dual-Port Static RAM (Cypress)
CY7C136AE - 1K/2K x 8 Dual-Port Static RAM (Cypress)
CY7C136E - 1K/2K x 8 Dual-Port Static RAM (Cypress)
CY7C1370C - 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture (Cypress)
CY7C1370CV25 - 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture (Cypress)
CY7C1370D - 18-Mbit (512 K 횞 36/1 M 횞 18) Pipelined SRAM (Cypress)
CY7C1371C - 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL Architecture (Cypress)

Other Datasheets by Cypress Semiconductor

Published: Oct 9, 2006 |