CY7C1363D Datasheet (Cypress Semiconductor)

CY7C1363D, 9-Mbit Flow-Through SRAM

The CY7C1363D is a 3.3 V, 512K × 18 synchronous flow-through SRAM, respectively designed to interface with high speed microprocessors with minimum glue logic.

Maximum access delay from clock rise is 6.5 ns (133 MHz version).

A 2-bit on-chip counter captures the first addres

CY7C1363D Features

* Supports 133 MHz bus operations

* 512K × 18 common I/O

* 3.3 V

* 5% and +10% core power supply (VDD)

* 2.5 V or 3.3 V I/O power supply (VDDQ)

* Fast clock-to-output times

* 6.5 ns (133-MHz version)

* Provide high performance 2-1-1-1 access rate

* User-select