Description
www.DataSheet4U.com CY7C4282 CY7C4292 64K/128K x 9 Deep Sync FIFOs with Retransmit and Depth Expansion .
The CY7C4282/CY7C4292 are high-speed, low-power, FIFO memories with clocked read and write interfaces.
Features
* High-speed, low-power, first-in first-out (FIFO) memories
* 64K × 9 (CY7C4282)
* 128K × 9 (CY7C4292)
* 0.5-micron CMOS for optimum speed/power
* High-speed, near-zero latency (true dual-ported memory cell), 100-MHz operation (10-ns read/write cycle times)
Applications
* Clock frequencies up to 100 MHz are achievable. D0-8 INPUT REGISTER
Logic Block Diagram
WCLK WEN FLAG PROGRAM REGISTER WRITE CONTROL FF FLAG LOGIC Dual Port RAM Array 64K x 9 128K x 9 READ POINTER EF PAE PAF/XO
WRITE POINTER
RS
RESET LOGIC
FL/RT XI/LD PAF/XO EXPANSION LOGIC
THREE-STATE OUTPU
