CYRS1542AV18 - 72-Mbit QDR II+ SRAM Two-Word Burst Architecture

Cypress Semiconductor

Datasheet Details

Part number	CYRS1542AV18
Manufacturer	Cypress Semiconductor
File Size	454.44 KB
Description	72-Mbit QDR II+ SRAM Two-Word Burst Architecture
Datasheet	CYRS1542AV18-CypressSemiconductor.pdf

The CYRS1542AV18 and CYRS1544AV18 are synchronous pipelined SRAMs, equipped with 1.8-V QDR II+ architecture with RadStop™ technology.

Separate independent read and write data ports.
Supports concurrent transactions.
250-MHz clock for high bandwidth.
2-word burst on all accesses.
Double data rate (DDR) interfaces on both read and write ports at 250 MHz (data transferred at 500 MHz).
Two input clocks (K and K) for precise DDR timing.
SRAM uses rising edges only.
Echo clocks (CQ and CQ) simplify data capture in high speed systems.
Single multiplexed address input bus latches address i.

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Published: Dec 3, 2014 |