* Separate independent read and write data ports
* Supports concurrent transactions
* 250 MHz clock for high bandwidth
* Four-word burst for reducing address bus frequency
* Double data rate (DDR) interfaces on both read and write ports at 250 MHz (data transferred at 500 MHz)
CYRS1545AV18 Datasheet (465.06 KB)
CYRS1545AV18
Cypress Semiconductor
465.06 KB
72-mbit qdr ii+ sram four-word burst architecture.
72-Mbit QDR® II+ SRAM Four-Word Burst Architecture with RadStop™ Technology
Radiation Performance
Radiation Data
* Total Dose =300 Krad
* Sof.
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