PSoC4500S - Programmable System-on-Chip

Cypress Semiconductor

Datasheet Details

Part number	PSoC4500S
Manufacturer	Cypress Semiconductor
File Size	785.26 KB
Description	Programmable System-on-Chip
Datasheet	PSoC4500S-CypressSemiconductor.pdf

PSoC® 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an Arm® Cortex®-M0+ CPU.

32-bit MCU Subsystem.
48-MHz Arm Cortex-M0+ CPU with single-cycle multiply.
Up to 256 KB of flash with Read Accelerator.
Up to 32 KB of SRAM.
8-channel DMA engine.
Two Divide and Square Root computation accelerators Programmable Analog.
Four opamps with reconfigurable high-drive external and high-bandwidth internal drive and Comparator modes and ADC input buffering capability. Opamps can operate in Deep Sleep low-power mode.
Two 12-bit 1-Msps SAR ADCs with di.

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Published: Apr 6, 2020 |