CY7C1381D Datasheet - Cypress

CY7C1381D 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

The CY7C1381D/CY7C1383D/CY7C1383F is a 3.3 V, 512K × 36 and 1M × 18 synchronous flow through SRAMs, designed to interface with high speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip counter captures the first address in a.

CY7C1381D Features

* Supports 133 MHz bus operations

* 512K × 36 and 1M × 18 common I/O

* 3.3 V core power supply (VDD)

* 2.5 V or 3.3 V I/O supply (VDDQ)

* Fast clock-to-output time

* 6.5 ns (133 MHz version)

* Provides high performance 2-1-1-1 access rate

* User selectable burst count

CY7C1381D-Cypress.pdf

CY7C1381D Datasheet Preview — Preview of CY7C1381D PDF

Datasheet Details

Part number:

CY7C1381D

Manufacturer:

Cypress

File Size:

1.29 MB

Description:

18-mbit (512k x 36/1m x 18) flow-through sram.

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TAGS

CY7C1381D CY7C1381D 18-Mbit 512K Flow-Through SRAM Cypress

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