CY7C1386S - 18-Mbit (512 K x 36) Pipelined DCD Sync SRAM

Cypress

CY7C1386S Datasheet Preview — Preview of CY7C1386S PDF

Datasheet Details

Part number	CY7C1386S
Manufacturer	Cypress
File Size	520.16 KB
Description	18-Mbit (512 K x 36) Pipelined DCD Sync SRAM
Datasheet	CY7C1386S-Cypress.pdf

CY7C1386S Product details

Description

The CY7C1386S SRAM integrates 512 K × 36 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation.

Features

Supports bus operation up to 167 MHz.
Available speed grade is 167 MHz.
Registered inputs and outputs for pipelined operation.
Optimal for performance (double-cycle deselect).
Depth expansion without wait state.
3.3 V core power supply (VDD).
2.5 V or 3.3 V I/O power supply (VDDQ).
Fast clock-to-output times.
3.4 ns (for 167 MHz device).
Provides high-performance 3-1-1-1 access rate.
User selectable burst counter supporting Intel Pentium.

📁 CY7C1386S Similar Datasheet

CY7C1386B - (CY7C1386B / CY7C1387B) 512K x 36/1M x 18 Pipelined DCD SRAM (Cypress Semiconductor)
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Published: Oct 2, 2016 |