* Supports bus operation up to 200 MHz
* Available speed grades are 200, and 167 MHz
* Registered inputs and outputs for pipelined operation
* Optimal for performance (double-cycle deselect)
* Depth expansion without wait state
* 3.3 V core power supply (VDD)
* 2.5 V or 3
CY7C1386D
Cypress Semiconductor
1.96 MB
18-mbit (512k x 36/1 mbit x 18) pipelined dcd sync sram.
Not Recommended for New Design
CY7C1386D CY7C1387D
18-Mbit (512K × 36/1M × 18) Pipelined DCD Sync SRAM
18-Mbit (512K × 36/1M × 18) Pipelined DCD Syn.
📁 Related Datasheet
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CY7C1380CV25 (CY7C1380CV25 / CY7C1382CV25) 512K x 36/1M x 18 Pipelined SRAM (Cypress Semiconductor)
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