Datasheet4U Logo Datasheet4U.com

DFPMUL Floating Point Pipelined Multiplier Unit

DFPMUL Description

DFPMUL www.DataSheet4U.com Floating Point Pipelined Multiplier Unit ver 2.70 OVERVIEW * Fully synthesizable, static synchronous design with no in.
PIN clk rst en adatai[31:0] bdatai[31:0] datao[31:0] ofo ufo ifo TYPE Input Input Input Input Input DESCRIPTION Global system clock Global system rese.

DFPMUL Features

* Full IEEE-754 compliance Single precision real format support Simple interface No programming required 7 levels pipeline Full accuracy and precision Overflow, underflow and invalid operation flags Results available at every clock Fully configurab

📥 Download Datasheet

Preview of DFPMUL PDF
datasheet Preview Page 2 datasheet Preview Page 3

Datasheet Details

Part number
DFPMUL
Manufacturer
Digital Core Design
File Size
172.83 KB
Datasheet
DFPMUL_DigitalCoreDesign.pdf
Description
Floating Point Pipelined Multiplier Unit

📁 Related Datasheet

  • DFP1000 - Dual output 1000 Watt AC/DC PFC front-end for distributed power architectures (Artesyn Technologies)
  • DFP14 - Thick Film Resistor Networks Flat Pack (Vishay Siliconix)
  • DFP16 - Thick Film Resistor Networks Flat Pack (Vishay Siliconix)
  • DFP2N60 - N-Channel MOSFET (DnI)
  • DFP30N06 - N-Channel MOSFET (DnI)
  • DFP4N60 - N-Channel MOSFET (DnI)
  • DFP50N06 - N-Channel MOSFET (DnI)
  • DFP630 - N-Channel MOSFET (DnI)

📌 All Tags

Floating Point Pipelined Multiplier Unit Digital Core Design
Digital Core Design DFPMUL-like datasheet