Datasheet Details
- Part number
- DFPADD
- Manufacturer
- Digital Core Design
- File Size
- 151.46 KB
- Datasheet
- DFPADD_DigitalCoreDesign.pdf
- Description
- Floating Point Pipelined Adder Unit
DFPADD Description
DFPADD www.DataSheet4U.com Floating Point Pipelined Adder Unit ver 2.50 OVERVIEW * Fully synthesizable, static synchronous design with no interna.
PIN clk rst en adatai[31:0] bdatai[31:0] datao[31:0] ofo ufo ifo TYPE Input Input Input Input Input DESCRIPTION Global system clock Global system rese.
DFPADD Features
* Full IEEE-754 compliance Single precision real format support Simple interface No programming required 5 levels pipeline Full accuracy and precision Results available at every clock Overflow, underflow and invalid operation flags Fully configurab
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