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DFPDIV

Floating Point Pipelined Divider Unit

DFPDIV Features

* Full IEEE-754 compliance Single precision real format support Simple interface No programming required 15 levels pipeline Full accuracy and precision Results available at every clock Overflow, underflow and invalid operation flags Fully configura

DFPDIV General Description

PIN clk rst en adatai[31:0] bdatai[31:0] datao[31:0] ofo ufo ifo TYPE Input Input Input Input Input DESCRIPTION Global system clock Global system reset Enable computing A data bus input B data bus input Output Data bus output Output Overflow flag Output Underflow flag Output Invalid result flag .

DFPDIV Datasheet (170.53 KB)

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Datasheet Details

Part number:

DFPDIV

Manufacturer:

Digital Core Design

File Size:

170.53 KB

Description:

Floating point pipelined divider unit.
DFPDIV www.DataSheet4U.com Floating Point Pipelined Divider Unit ver 2.15 OVERVIEW
* Fully synthesizable, static synchronous design with no inter.

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DFPDIV Floating Point Pipelined Divider Unit Digital Core Design

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