DFPDIV Floating Point Pipelined Divider Unit

Digital Core Design

Description

DFPDIV www.DataSheet4U.com Floating Point Pipelined Divider Unit ver 2.15 OVERVIEW * Fully synthesizable, static synchronous design with no inter.
PIN clk rst en adatai[31:0] bdatai[31:0] datao[31:0] ofo ufo ifo TYPE Input Input Input Input Input DESCRIPTION Global system clock Global system re.

📥 Download Datasheet

DFPDIV Datasheet Preview — Preview of DFPDIV PDF

Datasheet Specifications

Part number: DFPDIV
Manufacturer: Digital Core Design
File Size: 170.53 KB
Datasheet: DFPDIV_DigitalCoreDesign.pdf
Description: Floating Point Pipelined Divider Unit

Features

* Full IEEE-754 compliance Single precision real format support Simple interface No programming required 15 levels pipeline Full accuracy and precision Results available at every clock Overflow, underflow and invalid operation flags Fully configura

DFPDIV Distributors

📁 Related Datasheet

DFP1000 DFP14 DFP16 DFP2N60 DFP30N06 DFP4N60

📌 All Tags

DFPDIV Floating Point Pipelined Divider Unit Digital Core Design

Digital Core Design DFPDIV-like datasheet