Datasheet Details
- Part number
- M13D64322A
- Manufacturer
- ESMT
- File Size
- 1.20 MB
- Datasheet
- M13D64322A-ESMT.pdf
- Description
- Low Power DDR SDRAM
M13D64322A Description
ESMT LPDDR SDRAM .M13D64322A Features
* JEDEC Standard Internal pipelined double-data-rate architecture, two data access per clock cycle Bi-directional data strobe (DQS) No DLL; CLK to DQS is not synchronized. Differential clock inputs (CLK and CLK ) Four bank operation CAS Latency : 2, 3 Burst Type : Sequential and Interleave Burst Lengt
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