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M13S5121632A Double Data Rate SDRAM

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Description

ESMT M13S5121632A (2T) DDR SDRAM 8M x 16 Bit x 4 Banks Double Data Rate SDRAM .
Pin Name Function Pin Name Function A0~A12, BA0, BA1 Address inputs - Row address A0~A12 - Column address A0~A9 A10/AP: AUTO Precharge BA0, BA1:.

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Datasheet Specifications

Part number
M13S5121632A
Manufacturer
ESMT
File Size
1.70 MB
Datasheet
M13S5121632A-ESMT.pdf
Description
Double Data Rate SDRAM

Features

* Double-data-rate architecture, two data transfers per clock cycle
* Bi-directional data strobe (DQS)
* Differential clock inputs (CLK and CLK )
* DLL aligns DQ and DQS transition with CLK transition
* Four bank operation
* CAS Latency : 2, 2.5, 3
* Burst Type : Sequent

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