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M13S128168A Double Data Rate SDRAM

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Description

ESMT M13S128168A (2S) DDR SDRAM 2M x 16 Bit x 4 Banks Double Data Rate SDRAM .
Pin Name Function Pin Name Function A0~A11, BA0, BA1 Address inputs - Row address A0~A11 - Column address A0~A8 A10/AP: AUTO Precharge BA0, BA1: B.

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Features

* Double-data-rate architecture, two data transfers per clock cycle
* Bi-directional data strobe (DQS)
* Differential clock inputs (CLK and CLK )
* DLL aligns DQ and DQS transition with CLK transition
* Four bank operation
* CAS Latency : 2, 2.5, 3
* Burst Type : Sequent

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