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M13S128324A Double Data Rate SDRAM

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Description

ESMT DDR SDRAM M13S128324A (2M) Operation Temperature Condition -40°C~85°C 1M x 32 Bit x 4 Banks Double Data Rate SDRAM .
Pin Name Function Pin Name Function A0~A11, BA0,BA1 Address inputs - Row address A0~A11 - Column address A0~A7 A8/AP : AUTO Precharge BA0, BA1 :.

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Datasheet Specifications

Part number
M13S128324A
Manufacturer
ESMT
File Size
1.72 MB
Datasheet
M13S128324A-ESMT.pdf
Description
Double Data Rate SDRAM

Features

* Double-data-rate architecture, two data transfers per clock cycle
* Bi-directional data strobe (DQS)
* Differential clock inputs (CLK and CLK )
* DLL aligns DQ and DQS transition with CLK transition
* Quad bank operation
* CAS Latency : 2, 2.5, 3
* Burst Type : Sequenti

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