M13S2561616A - 4M x 16 Bit x 4 Banks Double Data Rate SDRAM

Elite Semiconductor Memory Technology

M13S2561616A Datasheet Preview — Preview of M13S2561616A PDF

Datasheet Details

Part number	M13S2561616A
Manufacturer	Elite Semiconductor Memory Technology
File Size	753.94 KB
Description	4M x 16 Bit x 4 Banks Double Data Rate SDRAM
Datasheet	M13S2561616A_EliteSemiconductorMemoryTechnology.pdf

M13S2561616A Product details

Description

Pin Name Function Address inputs - Row address A0~A12 - Column address A0~A8 A10/AP : AUTO Precharge BA0, BA1 : Bank selects (4 Banks) Data-in/Data-out Row address strobe Column address strobe Write enable Ground Power Bi-directional Data Strobe.

Features

z z z z z z z z z z z z z z z z z z z z M13S2561616A 4M x 16 Bit x 4 Banks Double Data Rate SDRAM JEDEC Standard Internal pipelined double-data-rate architecture, two data access per clock cycle Bi-directional data strobe (DQS) On-chip DLL Differential clock inputs (CLK and CLK ) DLL aligns DQ and DQS transition with CLK transition Quad bank operation CAS Latency : 2; 2.5; 3 Burst Type : Sequential and Interleave Burst Length : 2, 4, 8 All inputs except data & DM are sampled at the rising edge.

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Published: Sep 17, 2009 |