M13S64164A-5TG2Y Datasheet, Sdram, ESMT

M13S64164A-5TG2Y Features

• Sdram z Double-data-rate architecture, two data transfers per clock cycle z Bi-directional data strobe (DQS) z Differential clock inputs (CLK and CLK ) z DLL aligns DQ and DQS transition wit

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M13S64164A-5TG2Y

Manufacturer:

ESMT

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1.19MB

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📄 Datasheet

Description:

1m x 16 bit x 4 banks double data rate sdram.

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M13S64164A-5TG2Y

ESMT

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