M52D256328A - Mobile Synchronous DRAM
The M52D256328A is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 32 bits.
Synchronous design allows precise cycle controls with the use of s
M52D256328A Features
* 1.8V power supply
* LVCMOS compatible with multiplexed address
* Four banks operation
* MRS cycle with address key programs - CAS Latency (3) - Burst Length (1, 2, 4, 8 & full page) - Burst Type (Sequential & Interleave)
* EMRS cycle with address
* All inputs are sampled at
