* z 2.5V power supply z LVCMOS compatible with multiplexed address z Dual banks operation z MRS cycle with address key programs - CAS Latency (1, 2 & 3 ) - Burst Length (1, 2, 4, 8 & full page) - Burst Type (Sequential & Interleave) z EMRS cycle with address key programs. z All inputs are sampled at t
M52S32321A Datasheet (868.68 KB)
M52S32321A
ESMT
868.68 KB
512k x 32bit x 2banks synchronous dram.
ESMT
Revision History :
Revision 1.0 (Oct. 31, 2006) - Original
Revision 1.1 (Dec. 29, 2006) - Add -6 spec
Revision 1.2 (Mar. 02, 2007) - Modify VOH a.
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