EDD2516AETA Features
* Double-data-rate architecture; two data transfers per clock cycle
* The high-speed data transfer is realized by the 2 bits prefetch pipelined architecture
* Bi-directional data strobe (DQS) is transmitted /received with data for capturing data at the receiver
* Data
Datasheet Details
EDD2516AETA, EDD2508AETA
Elpida Memory
648.64 KB
(edd2508aeta / edd2516aeta) 256m bits ddr sdram.
This datasheet PDF includes multiple part numbers: EDD2516AETA, EDD2508AETA.
Please refer to the document for exact specifications by model.
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EDD2516AETA Distributor
