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FIN1026 3.3V LVDS 2-Bit High Speed Differential Receiver

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Description

FIN1026 3.3V LVDS 2-Bit High Speed Differential Receiver June 2002 Revised June 2002 FIN1026 3.3V LVDS 2-Bit High Speed Differential Receiver Genera.
This dual receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology.

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Datasheet Specifications

Part number
FIN1026
Manufacturer
Fairchild Semiconductor
File Size
226.19 KB
Datasheet
FIN1026_FairchildSemiconductor.pdf
Description
3.3V LVDS 2-Bit High Speed Differential Receiver

Features

* s Greater than 400Mbs data rate s Flow-through pinout simplifies PCB layout s 3.3V power supply operation s 0.4ns maximum differential pulse skew s 2.5ns maximum propagation delay s Low power dissipation s Power-Off protection s Fail safe protection for open-circuit, shorted and terminated non-drive

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