* Linear Burst Order (LBO) input. The Burst function need not
* FT pin for user-configurable flow through or pipeline operation
* Dual Cycle Deselect (DCD) operation be used. New addresses can be loaded on every cycle with no degradation of chip performance. Flow Through/Pipeline Re
GS881E36CGT-xxxIV Datasheet (326.59 KB)
GS881E36CGT-xxxIV
GSI Technology
326.59 KB
9mb sync burst srams.
GS881E18/32/36C(T/D)-xxxIV
100-Pin TQFP & 165-bump BGA 512K x 18, 256K x 32, 256K x 36
Industrial Temp
9Mb Sync Burst SRAMs
250 MHz
*150 MH.
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