HD74LV174A Datasheet (Hitachi Semiconductor) - Hex D-type Flip-Flops with Clear

HD74LV174A, Hex D-type Flip-Flops with Clear

This device contains 6 master-slave flip-flops with a common clock and common clear.

Data on the D input having the specified setup and hold times is transferred to the Q output on the low to high transition of the clock input.

The clear input when low, sets all outputs to a low state.

Low-voltage a

HD74LV174A Features

* VCC = 2.0 V to 5.5 V operation All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max.) = 5.5 V (@VCC = 0 V) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°