H55S1G32MFP-60 Datasheet - Hynix Semiconductor

H55S1G32MFP-60 1Gb (32Mx32bit) Mobile SDRAM

and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 1.2 / Jun. 2008 1 www.DataSheet4U.com 1Gbit (32Mx32bit) Mobile SDR Memory H55S1G(2/3)2MFP Series Document Title 4Bank x 8M x 32bit Synchronous DRAM .

H55S1G32MFP-60 Features

* Standard SDRAM Protocol Clock Synchronization Operation - All the commands registered on positive edge of basic input clock (CLK) MULTIBANK OPERATION - Internal 4bank operation - During burst Read or Write operation, burst Read or Write for a different bank is performed. - During burst Read or Write

H55S1G32MFP-60_HynixSemiconductor.pdf