H5MS1262EFP 128M (8Mx16bit) Mobile DDR SDRAM

Hynix Semiconductor

Description

www.DataSheet4U.net 128Mbit MOBILE DDR SDRAM based on 2M x 4Bank x16 I/O Specification of 128M (8Mx16bit) Mobile DDR SDRAM Memory Cell Array - Orga.
and is subject to change without notice.

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Datasheet Specifications

Part number: H5MS1262EFP
Manufacturer: Hynix Semiconductor
File Size: 1.35 MB
Datasheet: H5MS1262EFP_HynixSemiconductor.pdf
Description: 128M (8Mx16bit) Mobile DDR SDRAM

Features

* SUMMARY
* Mobile DDR SDRAM clock cycle
* MODE RERISTER SET, EXTENDED MODE REGISTER SET and STATUS REGISTER READ - Keep to the JEDEC Standard regulation (Low Power DDR SDRAM) - Double data rate architecture: two data transfer per
* Mobile DDR SDRAM INTERFACE - x16 bus width: H5MS1262E

Applications

* which use the battery such as PDAs, 2.5G and 3G cellular phones with internet access and multimedia capabilities, mini-notebook, hand-held PCs. It is organized as 4banks of 4,194,304 x16. The HYNIX H5MS1262EFP series uses a double-data-rate architecture to achieve high-speed operation. The double da

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H5MS1262EFP 128M 8Mx16bit Mobile DDR SDRAM Hynix Semiconductor

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