H5MS2562JFR Datasheet - Hynix Semiconductor

H5MS2562JFR, Mobile DDR SDRAM 256Mbit (16M x 16bit)

256Mbit MOBILE DDR SDRAM based on 4M x 4Bank x16 I/O Specification of 256Mb (16Mx16bit) Mobile DDR SDRAM Memory Cell Array - Organized as 4banks of .
and is subject to change without notice.

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Datasheet Details

Part number:

H5MS2562JFR

Manufacturer:

Hynix Semiconductor

File Size:

1.30 MB

Description:

Mobile DDR SDRAM 256Mbit (16M x 16bit)

Features

* SUMMARY
* Mobile DDR SDRAM clock cycle
* MODE RERISTER SET, EXTENDED MODE REGISTER SET and STATUS REGISTER READ - Keep to the JEDEC Standard regulation (Low Power DDR SDRAM) - Double data rate architecture: two data transfer per
* Mobile DDR SDRAM INTERFACE - x16 bus width - Multiple

Applications

* which use the battery such as PDAs, 2.5G and 3G cellular phones with internet access and multimedia capabilities, mini-notebook, hand-held PCs. It is organized as 4banks of 4,194,304 x16. The HYNIX H5MS2562JFR series uses a double-data-rate architecture to achieve high-speed operation. The double da

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H5MS2562JFR Mobile DDR SDRAM 256Mbit 16M 16bit Hynix Semiconductor

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