H5MS2622JFR - 256Mb (8Mx32bit) Mobile DDR SDRAM
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Rev 1.2 / Apr.
2009 1 www.DataSheet4U.net 256Mbit MOBILE DDR SDRAM based on 2M x 4Bank x32 I/O Document Title 256MBit (4Bank x 2M x 32bits) MOBILE DDR S
H5MS2622JFR Features
* SUMMARY
* Mobile DDR SDRAM clock cycle
* MODE RERISTER SET, EXTENDED MODE REGISTER SET and STATUS REGISTER READ - Keep to the JEDEC Standard regulation (Low Power DDR SDRAM) - Double data rate architecture: two data transfer per
* Mobile DDR SDRAM INTERFACE - x32 bus width - Multiple
