Datasheet4U Logo Datasheet4U.com

H5MS2532JFR Datasheet - Hynix Semiconductor

H5MS2532JFR - 256Mb (8Mx32bit) Mobile DDR SDRAM

and is subject to change without notice.

Hynix does not assume any responsibility for use of circuits described.

No patent licenses are implied.

Rev 1.2 / Apr.

2009 1 www.DataSheet4U.net 256Mbit MOBILE DDR SDRAM based on 2M x 4Bank x32 I/O Document Title 256MBit (4Bank x 2M x 32bits) MOBILE DDR S

H5MS2532JFR Features

* SUMMARY

* Mobile DDR SDRAM clock cycle

* MODE RERISTER SET, EXTENDED MODE REGISTER SET and STATUS REGISTER READ - Keep to the JEDEC Standard regulation (Low Power DDR SDRAM) - Double data rate architecture: two data transfer per

* Mobile DDR SDRAM INTERFACE - x32 bus width - Multiple

H5MS2532JFR_HynixSemiconductor.pdf

Preview of H5MS2532JFR PDF
H5MS2532JFR Datasheet Preview Page 2 H5MS2532JFR Datasheet Preview Page 3

Datasheet Details

Part number:

H5MS2532JFR

Manufacturer:

Hynix Semiconductor

File Size:

1.57 MB

Description:

256mb (8mx32bit) mobile ddr sdram.

📁 Related Datasheet

📌 All Tags