H5MS1222EFP Datasheet (Hynix Semiconductor)

H5MS1222EFP, 128Mbit MOBILE DDR SDRAM

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Rev 1.0 / Jun.

2008 1 www.DataSheet4U.net Mobile DDR SDRAM 128Mbit (4M x 32bit) H5MS1222EFP Series Document Title 128MBit (4Bank x 1M x 32bits) MOBILE D

H5MS1222EFP Features

* SUMMARY Mobile DDR SDRAM - Double data rate architecture: two data transfer per clock cycle Mobile DDR SDRAM INTERFACE - x32 bus width: HY5MS5B2ALFP - Multiplexed Address (Row address and Column address) BURST LENGTH SUPPLY VOLTAGE - 1.8V device: VDD and VDDQ = 1.7V to 1.95V MEMORY CELL ARRAY - 128M