HY5V52F - 4Banks x 2M x 32bits Synchronous DRAM

Hynix Semiconductor

Datasheet Details

Part number	HY5V52F
Manufacturer	Hynix Semiconductor
File Size	345.39 KB
Description	4Banks x 2M x 32bits Synchronous DRAM
Datasheet	HY5V52F_HynixSemiconductor.pdf

and is subject to change without notice.

Voltage : VDD, VDDQ 3.3V All device pins are compatible with LVTTL interface 90Ball FBGA with 0.8mm of pin pitch All inputs and outputs referenced to positive edge of system clock Data mask function by DQM0,1,2 and 3.
Internal four banks operation.
Burst Read Single Write operation Programmable CAS Latency ; 2, 3 Clocks.
Auto refresh and self refresh 4096 Refresh cycles / 64ms Programmable.

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Published: Jan 21, 2007 |