HY5V52F Datasheet (Hynix Semiconductor) - 4Banks x 2M x 32bits Synchronous DRAM

HY5V52F, 4Banks x 2M x 32bits Synchronous DRAM

and is subject to change without notice.

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Rev.

0.1 / June.

2004 1 Preliminary HY5V52(L)F(P) Series 4Banks x 2M x 32bits Synchronous DRAM DESCRIPTION The Hynix HY5V52(L)F(P) series is a 268,435,456

HY5V52F Features

* Voltage : VDD, VDDQ 3.3V All device pins are compatible with LVTTL interface 90Ball FBGA with 0.8mm of pin pitch All inputs and outputs referenced to positive edge of system clock Data mask function by DQM0,1,2 and 3

* Internal four