HY5V66EF6 Datasheet - Hynix Semiconductor

HY5V66EF6 (HY5V66ExF6x) CMOS Synchronous DRAM

and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 0.2 / June. 2005 1 www.DataSheet4U.com Synchronous DRAM Memory 64Mbit (4Mx16bit) HY5V66E(L)F6(P) Series 11Preliminary DESCRIPTION The Hynix HY5V66.

www.DataSheet4U.com 64Mb Synchronous DRAM based on 1M x 4Bank x16 I/O Document Title 4Bank x 1M x 16bits Synchronous DRAM Revision History Revision No. 0.01 Initial Draft 1. Editorial chage 0.80Typ > 0.45 +/-0.05 (page12, Ball Dimension) Before dimension : History Draft Date Dec. 2004 Remark Preliminary 0.80 Typ. 0.65 Typ. 0.2 After dimension : June. 2005 Preliminary 0.450 +/- 0.05 0.65 Typ. 2. Added Speed Product(100MHz CL2) (see to Page 02) This document is a general prod.

HY5V66EF6 Features

* Voltage: VDD, VDDQ 3.3V supply voltage All device pins are compatible with LVTTL interface 60 Ball FBGA (Lead or Lead Free Package) All inputs and outputs referenced to positive edge of system clock Data mask function by UDQM, LDQM

HY5V66EF6 Datasheet (253.56 KB)