HY5DU281622FTP - 128Mb DDR SDRAM
and is subject to change without notice.
Hynix Semiconductor does not assume any responsibility for use of circuits described.
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Rev.
0.03 /Jun.
2006 1 HY5DU281622FT(P) Series Revision History Revision No.
0.01 0.02 0.03 First version for internal review State Diagram
HY5DU281622FTP Features
* VDD, VDDQ = 2.3V min ~ 2.7V max (Typical 2.5V Operation +/- 0.2V for DDR266, 333) VDD, VDDQ = 2.4V min ~ 2.7V max (Typical 2.6V Operation +0.1/- 0.2V for DDR400 and 400Mbps/pin product) All inputs and outputs are compatible with SSTL_2 interface Fully differential clock inputs (C
