HY5DU281622AT Datasheet, Sdram, Hynix Semiconductor

HY5DU281622AT Features

• Sdram
• VDD, VDDQ = 2.5V +/- 0.2V All inputs and outputs are compatible with SSTL_2 interface Fully differential clock inputs (CK, /C

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HY5DU281622AT

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Hynix Semiconductor

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📄 Datasheet

Description:

(hy5du28xxxat) 3rd 128m ddr sdram. and is subject to change without notice. Hynix semiconductor does not assume any responsibility for use of circuits described. No pat

HY5DU281622AT Application

• Applications which requires large memory density and high bandwidth. The Hynix 128Mb DDR SDRAMs offer fully synchronous operations referenced to bot

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HY5DU281622AT

Hynix Semiconductor

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