ICS557-08 Datasheet - ICST

ICS557-08 2:1 MULTIPLEXER CHIP

The ICS557-08 is a 2:1 multiplexer chip that allows the user to select one of the two HCSL (Host Clock Signal Level) or LVDS input pairs and fan out to one pair of differential HCSL or LVDS outputs. This chip is suited especially for PCI-Express applications, where there is a need to select the PCI-.

ICS557-08 Features

* Packaged in 16-pin TSSOP Available in Pb (lead) free package Operating voltage of 3.3 V Low power consumption Input clock frequency of up to 200 MHz for HCSL and up to 100 MHz for LVDS

* Jitter 60 ps (cycle-to-cycle) Block Diagram VDD 3 OE

ICS557-08_ICST.pdf