ICS673-01 Datasheet (IDT) - PLL BUILDING BLOCK

ICS673-01, PLL BUILDING BLOCK

The ICS673-01 is a low cost, high performance Phase Locked Loop (PLL) designed for clock synthesis and synchronization.

Included on the chip are the phase detector, charge pump, Voltage Controlled Oscillator (VCO), and two output buffers.

One output buffer is a divide by two of the other.

Through th

ICS673-01 Features

* Packaged in 16 pin SOIC (Pb-free, ROHS compliant)

* Access to VCO input and feedback paths of PLL

* VCO operating range up to 120 MHz (5V)

* Able to lock MHz range outputs to kHz range inputs through the use of external dividers

* Output Enable tri-states ou