Description
QUADRACLOCK QUADRATURE DELAY BUFFER DATASHEET ICS672-01/02 .
The ICS672-01/02 are zero delay buffers that generate four output clocks whose phases are spaced at 90° intervals.
Features
* Packaged in 16-pin SOIC
* Pb (lead) free package, RoHS compliant
* Input clock range from 5 MHz to 150 MHz (depends on
multiplier)
* Clock outputs from up to 84 MHz (ICS672-01) and up to
135 MHz (ICS672-02)
* Zero input-output delay
* Integrated x0.5
Applications
* The ICS672-01/02 each provide a total of five output clocks with multiple phase shifts relative to the input clock (ICLK). Phase shifts of 0° (CLK0), 90° (CLK90), 180° (CLK180), and 270° (CLK270) are provided, plus one feedback clock (FBCLK). All output clocks will be a multiple of the input clock,
