ICS671-15 Datasheet - Integrated Circuit Systems

ICS671-15 Low Skew Buffer

The ICS671-15 is a low-jitter, low-skew, high-performance zero delay buffer (ZDB) for high-speed applications. The device is designed using ICS’ proprietary low-jitter PLL (Phase-Locked Loop) techniques. The ICS671-15 includes a ZDB bank of four outputs running at 33 MHz, and two outputs at 66 MHz f.

ICS671-15 Features

* Packaged in 24-pin TSSOP

* Input-output delay (±300 ps)

* Two ZDB 66 MHz outputs from a 66 MHz input AGP clock

* Two ZDB 66 MHz outputs, plus four 33 MHz outputs from a 33 MHz input CPU clock

* Output-to-output skew is less than 250 ps

* Full CMOS

ICS671-15_IntegratedCircuitSystems.pdf