Description
AUGUST 2023
The IS43/46LD32128B is 4Gbit CMOS LPDDR2 DRAM.The device is organized as 8 banks of 16Meg words of 32bits.This product uses a double-datarate architecture to achieve high-speed operation.The double data rate architecture is essentially a 4N prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins.This product offers fully synchronous operations referenced to both rising and falling edges of the clock.The data paths are interna
Features
- DDP (Dual Die Package) with 2 x 2Gb LPDDR2.
- Low-voltage Core and I/O Power Supplies VDD2 = 1.14-1.30V, VDDCA/VDDQ = 1.14-1.30V, VDD1 = 1.70-1.95V.
- High Speed Un-terminated Logic(HSUL_12) I/O Interface.
- Clock Frequency Range : 10MHz to 533MHz (data rate range : 20Mbps to 1066Mbps per I/O).
- Four-bit Pre-fetch DDR Architecture.
- Multiplexed, double data rate, command/address inputs.
- Eight internal banks for concurrent operation.